Each time something happens, the count ticks upwards. PMC (Performance Monitoring Counter) and IBS (Instruction Based Sampling) counters are the bread-and-butter, and deserve their own sections because of their importance.ĪMD's classic Performance Counters: "PMC"ĪMD's PMC counters are your classic setup. Because the 元 cache is shared between 4-cores at a time, it is usually difficult to accurately profile the 元 cache hit/miss ratio for your particular program.ĭF stands for "Data Fabric" counters. On AMD Zen, there are roughly four kinds of counters: Per-core PMCs, Per-core IBS, CCX Counters, and DF Counters.ĬCX Counters primarily consist of 元 cache. AMD Zen's are listed in section 2.1.11 here. There are dozens, maybe hundreds, of counters to keep track of.
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Linux additionally has a tool called "perf" which tries to be cross-platform (despite the CPU-specific nature of this task).ĪMD uProf is free on both Linux and Windows, which is a major benefit over Intel VTune. In the PC / Windows world, Intel VTune or AMD uProf are used to access these counters. Qualcomm would have different counters than Apple (even if both are ARM). Intel has their own, AMD has their own, and even on phones. However, these hardware performance counters are specific to each CPU.
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Any modern processor can count L1 / L2 / 元 cache hits and misses, Branch hits and Mispredictions, and even give you exact cycle counts across your code base.įor a low-level programmer focusing on optimization, these counts can provide more insight into why and/or how your program is slow. But modern CPUs all offer more detailed counters than just time alone. Most programmers are aware of time-based profiling.